Fabrication of Nanodots Using Microphase Separation of Block Copolymer

Silicon microchips have continued to grow progressively smallerto meet the demands of a competitive market. The next step indevelopment will send the chips from micro-order to nano-order,giving rise to new and challenging complications. Here, twomethods are explored to develop such technology. The firstinvolves molecular beam epitaxial (MBE) growth of isotopicallycontrolled Si-based quantum computers. Manual scoring ofisotopically pure 28-Si chip followed by kink-up DC correcting andsubsequent 29-Si addition leaves equally distributed lines of 29-Siwith controllable nuclear spin. Capping the lines on one end withNi/Fe magnets and on the other end with P atoms, individual spincan be read out and controlled using NMR. The second methodinvolves modifying the traditional Metal Oxide SemiconductorField Effect Transistor (MOS FET) for successful nano-scaleoperation. Excessive boron diffusion causes unwanted digitallogic stage switching in nano-order MOS FET, so methods tocontrol boron diffusion, transient and oxygen enhanced diffusion,are studied.Building The All-Silicon Model The All-Silicon ModelBackgroundGordon Moore’s Law: Market transistors need toprogressively decrease in size by a factor of two everytwo years -Quantum Challenge: Progressing from micro tonanoscale transistors presents new physical andmethodological hurdles -Adaptation versus Innovation: Creating new transistordesigns or reinventing old ones 29Si atoms are positioned regularly in chains in a 7-Teslamagnetic field A 2-Tesla Ni/Fe magnet at one end of the chainindividualizes the spin of each 29SI atom Nuclear Magnetic Resonance (NMR) is used to locate each29Si atom and control its spin direction A phosphorus atom at the opposite end of the chainallows NMR to differentiate between multiple chains In the coming years, it is projected that exact positioningof 29Si and precise NMR readout will allow development ofthe first working All-Silicon Quantum Computer1. Manual scoring of 28Si chips produces regular step arrays2. Subsequent DC heating corrects nanoscale imperfections3. Controlled exposure to natural Silicon allows chains of 29Sito form on the apex of each step